陆昱宽

Sources:

• UWashington: CSE378, Lecture12

Note: the assembly code in this article can be MIPS or RISCV. This shouldn't be consufusing since the only big difference between them is that MIPS add a $ before the name of each register:

1
2
3
4
5

# MIPS:
add $t0, $t1, $t2  # add values in $t1 and $t2, the result is stored in $t0

# RISC-V
add t0, t1, t2 # add values in t1 and t2, the result is stored in t0

Papers:

1. RSSM

2. DreamerV1

3. DreamerV2

4. DreamerV3

How to use LLMs (Large Language Models), including how to host them, how to add a frontend to them and others.

Resources for essential topics of Software Engineering, including Distributed systems, Database, Operating Systems, etc.

Sources:

1. --> Gymnasium github repo
2. --> Documentation

Gymnasium is the successsor of the famous OpenAI Gym library. It's highly recommended to move to gymnasium since gym is not being maintained.

Gymnasium is maintained by the Farama Foundation, an open-Sources nonprofit foundation.

Sources:

1. --> Documentation
2. --> Turorial

ViZDoom allows developing AI bots that play Doom using only visual information (the screen buffer). It is primarily intended for research in machine visual learning, and deep reinforcement learning, in particular.

Sources:

1. UWashington: CSE378, Lecture09
2. UWashington: CSE378, Lecture10
3. John L. Hennessy & David A. Patterson. (2019). Appendix C.1. Computer Architecture: A Quantitative Approach (6th ed.). Elsevier Inc.
4. Randal E. Bryant & David R. O’Hallaron. (2016). Chapter 4. Processor Architecture. Computer Systems: A Programmer’s Perspective (3th ed., pp. 387-516). Pearson.

Note: the assembly code in this article can be MIPS or RISCV. This shouldn't be consufusing since the only big difference between them is that MIPS add a $ before the name of each register:

1
2
3
4
5

# MIPS:
add $t0, $t1, $t2  # add values in $t1 and $t2, the result is stored in $t0

# RISC-V
add t0, t1, t2 # add values in t1 and t2, the result is stored in t0

Sources:

1. John L. Hennessy & David A. Patterson. (2019). Chapter 2. Memory Hierarchy Design. Computer Architecture: A Quantitative Approach (6th ed., pp. 78-148). Elsevier Inc.
2. RISC-V instruction format
3. ECS201A: ISAs and Machine Representation

Sources:

1. UWashington: CSE471, Lecture04
2. UCSD: CSE240A, Lecture13
3. John L. Hennessy & David A. Patterson. (2019). Chapter 3. Instruction-Level Parallelism and Its Exploitation. Computer Architecture: A Quantitative Approach (6th ed., pp. 168-266). Elsevier Inc.

Sources:

1. UWashington: CSE378, Lecture13
2. John L. Hennessy & David A. Patterson. (2019). Chapter 1. Fundamentals of Quantitative Design and Analysis. Computer Architecture: A Quantitative Approach (6th ed.). Elsevier Inc.